This invention relates to semiconductor memory devices, and more particularly to an N-channel silicon gate MOS read only memory and a process for making it.
Storage of fixed programs in digital equipment such as minicomputers and microprocessor systems is usually provided by MOS read only memory devices or "ROMs". The economics of manufacture of semiconductor devices such as ROMs, and of mounting them on circuit boards in the system, are such that the number of memory bits per semiconductor chip is advantageously as high as possible. ROMs of up to 32K bits (32,768) are typical at present. Within a few years, standard sizes will progress through 64K, 128K, 256K and 1 megabit. This dictates that cell size for the storage cells of the ROM be quite small. Metal gate ROMs of small size can be relatively easily fabricated in the manner set forth in U.S. Pat. No. 3,541,543, assigned to Texas Instruments, but usually these are programmed by the gate level mask which is at an early stage in the process. Most microprocessor and computer parts are now made by the N-channel silicon gate process because of the shorter access times provided. In the past, the N-channel process has not been favorable to layout of ROM cells of small size and/or programming has been by the moat mask, also early in the process. N-channel ROMs are disclosed in prior applications Ser. Nos. 762,612, filed Jan. 26, 1977, now U.S. Pat. No. 4,151,020, 890,555, now U.S. Pat. No. 4,290,184, 890,556, and 890,557 now U.S. Pat. No. 4,198,693, filed Mar. 20, 1978, all assigned to Texas Instruments. A series ROM and method of programming is shown in U.S. Pat. No. 4,059,826 to Gerald D. Rogers, assigned to Texas Instruments. Also, previous cells have been programmed at the metal level mask by contact areas between metal lines and polysilicon gates, or by contacts between metal lines and N+ source or drain regions, using excessive space on the chip. A problem encountered when the cell size is reduced is that the spacing between parallel adjacent conductors such as the metal or polysilicon row lines wastes area; this space is nonfunctional other than for manufacturing tolerance.
It is the principal object of this invention to provide a semiconductor device such as a permanent store memory cell of small size. Another object is to provide a small-area memory cell which is made by a process compatible with standard N-channel silicon gate manufacturing techniques.